Multichannel clock and data recovery : A synchronous approach /
Ahmed Mohammed Ahmed Nassar
Multichannel clock and data recovery : A synchronous approach / الاستعادة متعددة القنوات للساعة والبيانات : مدخل متزامن Ahmed Mohammed Ahmed Nassar ; Supervised Ahmed Hussein Khalil , Ahmed Eladawy Emira , Wael Sobhy Ghabrial - Cairo : Ahmed Mohammed Ahmed Nassar , 2009 - 140P. : charts ; 30cm
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
In this thesis, I propose a novel fully integrated scalable multi - channel clock and data recovery design that realizes significant area and power savings to bring Tbps (tera - bits - per - second ) communication within reach and make it an integrable function at the periphery of high - speed systems and SoCs . The proposed chip design exploits the synchrony of multiple point - to - point optical or inter - chip links and constructs a novel scalable architecture that saves on chip area by using a single VCO block to drive multiple phase detection loops
Clock and data recovery Jitter Phase - locked loops
Multichannel clock and data recovery : A synchronous approach / الاستعادة متعددة القنوات للساعة والبيانات : مدخل متزامن Ahmed Mohammed Ahmed Nassar ; Supervised Ahmed Hussein Khalil , Ahmed Eladawy Emira , Wael Sobhy Ghabrial - Cairo : Ahmed Mohammed Ahmed Nassar , 2009 - 140P. : charts ; 30cm
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
In this thesis, I propose a novel fully integrated scalable multi - channel clock and data recovery design that realizes significant area and power savings to bring Tbps (tera - bits - per - second ) communication within reach and make it an integrable function at the periphery of high - speed systems and SoCs . The proposed chip design exploits the synchrony of multiple point - to - point optical or inter - chip links and constructs a novel scalable architecture that saves on chip area by using a single VCO block to drive multiple phase detection loops
Clock and data recovery Jitter Phase - locked loops