Error correction in floating point units using information redundancy /
Shehab Yomn Abdellatif Elsayed
Error correction in floating point units using information redundancy / تصحيح الأخطاء فى وحدات الأعداد الكسرية بإستخدام معلومات زائدة Shehab Yomn Abdellatif Elsayed ; Supervised Hossam A. H. Fahmy - Cairo : Shehab Yomn Abdellatif Elsayed , 2012 - 80P. : charts ; 30cm
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
This work is an attempt to achieve fault tolerance in a combined floating point redundant adder by using residue codes . To our knowledge this is the first implementation of a residue error correction scheme in decimal and binary arithmetic circuits . The proposed method is able to correct any error in the 4- digit numbers being checked assuming that errors occure only in the main adder
Error correction Floating point numbers Residue codes
Error correction in floating point units using information redundancy / تصحيح الأخطاء فى وحدات الأعداد الكسرية بإستخدام معلومات زائدة Shehab Yomn Abdellatif Elsayed ; Supervised Hossam A. H. Fahmy - Cairo : Shehab Yomn Abdellatif Elsayed , 2012 - 80P. : charts ; 30cm
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
This work is an attempt to achieve fault tolerance in a combined floating point redundant adder by using residue codes . To our knowledge this is the first implementation of a residue error correction scheme in decimal and binary arithmetic circuits . The proposed method is able to correct any error in the 4- digit numbers being checked assuming that errors occure only in the main adder
Error correction Floating point numbers Residue codes