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Fpga-Based Hardware Design Of A Fully-Stochastic Spiking Neural Network / by Youssef Hassan Mohamed Gamal ElDin ; Under the Supervision of Prof. Dr. Neamat Sayed Abdelkader, Prof. Dr. Hassan Mostafa Hassan

By: Contributor(s): Material type: TextTextLanguage: English Summary language: English, Arabic Producer: 2023Description: 78 pages : illustrations ; 30 cm. + CDContent type:
  • text
Media type:
  • Unmediated
Carrier type:
  • volume
Other title:
  • تصميم عشوائي بالكامل لجهاز على مصفوفات البوابات المنطقية القابلة للبرمجة لشبكة عصبية [Added title page title]
Subject(s): DDC classification:
  • 621.3821
Available additional physical forms:
  • Issued also as CD
Dissertation note: Thesis (M.Sc.)-Cairo University, 2023. Summary: With the continuous improvement of spiking neural networks and their performance getting closer to conventional artificial neural networks,the need for more efficient imple- mentations of spiking neuron and learning hardware is on the rise. This Thesis presents a digital FPGA implementation of Izhikevich neuron together with online stochastic spike time dependant plasticity learning. The design utilizes the capabilities of stochastic computing, using only simple logical gates for multiplication and addition operations. The stochastic Izhikevich design is simulated using MATLAB code and compared to its ideal counterpart using phase plots and various test cases simulations. After that, the stochastic model is implemented on the FPGA of ZYNQ-7000 SoC and verified to produce the expected results. Similarly, the stochastic STDP learning algorithm is modelled using MATLAB and tested in a 20×1 SNN network. Finally, a 20×1 SNN using stochastic Izhikevich neurons together with stochastic STDP learning are implemented on the same FPGA and verified to work as expected. The performance metrics of the design are showing its low resource utilization and power consumption compared to other designs in literature. The presented stochastic Izhikevich hardware implementation is shown to use about 45% less resources compared to the designs of Izhikevich neurons in the literature as well as half as much power as the CORDIC design of the same neuron. In addition to that, The 20×1 network with the stochastic STDP is shown to have 60% less resource utilization when compared to a similar network with a CORDIC design. This low resource usage of the stochastic neuron and its ability to reuse parts of the hardware for multiple neuron allows it to be of excellent use for neural networks with a large neuron count like deep neural networks. Also, the whole network with the unsupervised STDP learning could be used for neural networks in simple applications.Summary: لقد اثبتت الشبكات العصبية النابضة قدرتها على تقديم اداء مقارب لالشبكات العصبية الاصطناعية في مجالات الذكاء الصطناعي المختلفة. و بناء على ذلك، تقدم هذه الرسال تطبيقا قليل الاستهلاك للطاقة و الموارد لخلايا عصبية نوع ازهيكيڤتش مع نوع تعلم اللدونة المعتمدة على الوقت معتمدا على الحوسبة العشوائية على مصفوفات البوابات المنطقية القابلة للبرمجة. تتم مقارنة التطبيق المطروح مع نظيره المثالي من وجهة نظر الدقة. و اخيرا، تتم مقارنة التطبيق المطروح مع التطبيقات المطروحة سابقا في اوراق البحث العلمي، سواءً علي مستوى تطبيق العصب او تطبيق الشبكة، و التاكد من تحقيقه لالاهداف المرجوة
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Thesis (M.Sc.)-Cairo University, 2023.

Bibliography: pages 63-67.

With the continuous improvement of spiking neural networks and their performance
getting closer to conventional artificial neural networks,the need for more efficient imple-
mentations of spiking neuron and learning hardware is on the rise. This Thesis presents
a digital FPGA implementation of Izhikevich neuron together with online stochastic
spike time dependant plasticity learning. The design utilizes the capabilities of stochastic
computing, using only simple logical gates for multiplication and addition operations.
The stochastic Izhikevich design is simulated using MATLAB code and compared
to its ideal counterpart using phase plots and various test cases simulations. After that,
the stochastic model is implemented on the FPGA of ZYNQ-7000 SoC and verified to
produce the expected results.
Similarly, the stochastic STDP learning algorithm is modelled using MATLAB and
tested in a 20×1 SNN network. Finally, a 20×1 SNN using stochastic Izhikevich neurons
together with stochastic STDP learning are implemented on the same FPGA and verified
to work as expected. The performance metrics of the design are showing its low resource
utilization and power consumption compared to other designs in literature.
The presented stochastic Izhikevich hardware implementation is shown to use about
45% less resources compared to the designs of Izhikevich neurons in the literature as well
as half as much power as the CORDIC design of the same neuron. In addition to that, The
20×1 network with the stochastic STDP is shown to have 60% less resource utilization
when compared to a similar network with a CORDIC design.
This low resource usage of the stochastic neuron and its ability to reuse parts of
the hardware for multiple neuron allows it to be of excellent use for neural networks
with a large neuron count like deep neural networks. Also, the whole network with the
unsupervised STDP learning could be used for neural networks in simple applications.

لقد اثبتت الشبكات العصبية النابضة قدرتها على تقديم اداء مقارب لالشبكات العصبية الاصطناعية في مجالات الذكاء الصطناعي المختلفة. و بناء على ذلك، تقدم هذه الرسال تطبيقا قليل الاستهلاك للطاقة و الموارد لخلايا عصبية نوع ازهيكيڤتش مع نوع تعلم اللدونة المعتمدة على الوقت معتمدا على الحوسبة العشوائية على مصفوفات البوابات المنطقية القابلة للبرمجة. تتم مقارنة التطبيق المطروح مع نظيره المثالي من وجهة نظر الدقة. و اخيرا، تتم مقارنة التطبيق المطروح مع التطبيقات المطروحة سابقا في اوراق البحث العلمي، سواءً علي مستوى تطبيق العصب او تطبيق الشبكة، و التاكد من تحقيقه لالاهداف المرجوة

Issued also as CD

Text in English and abstract in Arabic & English.

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