Hardware implementation of modal interval adder / Subtractor and multiplier / Ayman Abdelaziz Bakr Omar ; Supervised Hossam A. H. Fahmy
Material type: TextLanguage: English Publication details: Cairo : Ayman Abdelaziz Bakr Omar , 2012Description: 99P. : charts , plans ; 30cmOther title:- تنفيذ وحدات جمع وطرح وضرب الفترات المشروطة [Added title page title]
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Thesis | قاعة الرسائل الجامعية - الدور الاول | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2012.Ay.H (Browse shelf(Opens below)) | Not for loan | 01010110057971000 | |||
CD - Rom | مخـــزن الرســائل الجـــامعية - البدروم | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2012.Ay.H (Browse shelf(Opens below)) | 57971.CD | Not for loan | 01020110057971000 |
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Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
Rounding errors in digital computations using floating point numbers may result in totally inaccurate results . One of the mathematical solutions to monitor and control rounding errors is the classical interval arithmetic ( CIA ) . A generalized extension of the classical intervals was presented in 1980 which is the modal intervals
Issued also as CD
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