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Automatic generation of hardware design properties from simulation traces / Eman Mohamed Elmandouh Hussein ; Supervised Nevin Darwish , Amr G. Wassal

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Cairo : Eman Mohamed Elmandouh Hussein , 2012Description: 106P. : charts ; 30cmOther title:
  • الانتاج الآلى لخصائص الدوائر الإلكترونية بإستخدام التحليل الدينامكى لتتبع محاكاتها [Added title page title]
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Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Computer Engineering Summary: Assertion based verification is a promising approach to prove the correctness of today's comlex designs . This approach requies the formulation of design formal properties which is a time consuming non- trivial task . Therefore the acceptance and efficiency of assertion based verification techniques can be empowered by an automated support for the generation of design properties
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Item type Current library Home library Call number Copy number Status Date due Barcode
Thesis Thesis قاعة الرسائل الجامعية - الدور الاول المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.06.M.Sc.2012.Em.A (Browse shelf(Opens below)) Not for loan 01010110059081000
CD - Rom CD - Rom مخـــزن الرســائل الجـــامعية - البدروم المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.06.M.Sc.2012.Em.A (Browse shelf(Opens below)) 59081.CD Not for loan 01020110059081000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Computer Engineering

Assertion based verification is a promising approach to prove the correctness of today's comlex designs . This approach requies the formulation of design formal properties which is a time consuming non- trivial task . Therefore the acceptance and efficiency of assertion based verification techniques can be empowered by an automated support for the generation of design properties

Issued also as CD

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