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A compact model for double - gate nanoscale transistors / Islam Elsayed Ali Shaboon ; Supervised Serag E. D. Habib , Wael Fikry Farouk

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Cairo : Islam Elsayed Ali Shaboon , 2015Description: 66 P. : plans ; 30cmOther title:
  • نموذج مدمج للترانزستورات النانومترية مزدوجة البوابة [Added title page title]
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Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications Summary: Scaling down of MOS devices continuously achieves faster circuit speed, smaller area, and lower power dissipation. Multi - gate MOSFET is emerging as a very promising candidate for next generation ICs as it overcomes several limitations of the classical MOSFET at the deep submicron technology nodes. Therefore, the multi - gate MOSFET is currently a subject of intense scientific research. This thesis aims at enhancing and improving the compact model of the double - gate MOSFET. A review of the compact models developed previously for this MOSFET is given including the models by taur (2004), Hu (2004), AboElhadeed (2010) and garduno (2011). Additionally, we simulate numerically the double - gate MOSFET using the ATLAS device simulator. The results of this numerical device simulation are used as a reference to validate the accuracy of the aforementioned compact models. Next, we modified AboElhadeed{u2019}s model to include the effects of the source / drain series resistances, and the gate tunneling current. These effects improved the behavior of basic model of AboElhadeed and enabled us to bring down the fitting error from 25% for Hu{u2019}s model and 19% for the original AboElhadeed{u2019}s model to 5% only
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Item type Current library Home library Call number Copy number Status Date due Barcode
Thesis Thesis قاعة الرسائل الجامعية - الدور الاول المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2015.Is.C (Browse shelf(Opens below)) Not for loan 01010110066964000
CD - Rom CD - Rom مخـــزن الرســائل الجـــامعية - البدروم المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2015.Is.C (Browse shelf(Opens below)) 66964.CD Not for loan 01020110066964000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications

Scaling down of MOS devices continuously achieves faster circuit speed, smaller area, and lower power dissipation. Multi - gate MOSFET is emerging as a very promising candidate for next generation ICs as it overcomes several limitations of the classical MOSFET at the deep submicron technology nodes. Therefore, the multi - gate MOSFET is currently a subject of intense scientific research. This thesis aims at enhancing and improving the compact model of the double - gate MOSFET. A review of the compact models developed previously for this MOSFET is given including the models by taur (2004), Hu (2004), AboElhadeed (2010) and garduno (2011). Additionally, we simulate numerically the double - gate MOSFET using the ATLAS device simulator. The results of this numerical device simulation are used as a reference to validate the accuracy of the aforementioned compact models. Next, we modified AboElhadeed{u2019}s model to include the effects of the source / drain series resistances, and the gate tunneling current. These effects improved the behavior of basic model of AboElhadeed and enabled us to bring down the fitting error from 25% for Hu{u2019}s model and 19% for the original AboElhadeed{u2019}s model to 5% only

Issued also as CD

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