Design and implementation of an RF power amplifier using out- phasing as a linearization technique / Hazem Ibrahim Mahmoud Ahmed ; Supervised Ahmed Nader Mohieldin , Faisal Abdellatif Elseddeek , Mohamed Mostafa Aboudina
Material type: TextLanguage: English Publication details: Cairo : Hazem Ibrahim Mahmoud Ahmed , 2015Description: 87 P. : charts , facsimiles ; 30cmOther title:- تصميم وتنفيذ مكبر الطاقة في حيز ترددات الراديو بإستخدام أسلوب الطور الخارج لتحسين الخطية [Added title page title]
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Item type | Current library | Home library | Call number | Copy number | Status | Date due | Barcode | |
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Thesis | قاعة الرسائل الجامعية - الدور الاول | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2015.Ha.D (Browse shelf(Opens below)) | Not for loan | 01010110068489000 | |||
CD - Rom | مخـــزن الرســائل الجـــامعية - البدروم | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2015.Ha.D (Browse shelf(Opens below)) | 68489.CD | Not for loan | 01020110068489000 |
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Cai01.13.08.M.Sc.2015.Ge.T A table lookup-less method for correctly rounded IEEE 754 elementary functions / | Cai01.13.08.M.Sc.2015.Ge.T A table lookup-less method for correctly rounded IEEE 754 elementary functions / | Cai01.13.08.M.Sc.2015.Ha.D Design and implementation of an RF power amplifier using out- phasing as a linearization technique / | Cai01.13.08.M.Sc.2015.Ha.D Design and implementation of an RF power amplifier using out- phasing as a linearization technique / | Cai01.13.08.M.Sc.2015.Ib.D Design and implementation of an enhanced radar signal processor / | Cai01.13.08.M.Sc.2015.Ib.D Design and implementation of an enhanced radar signal processor / | Cai01.13.08.M.Sc.2015.Is.C A compact model for double - gate nanoscale transistors / |
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications
Through this thesis, a Class-B PA has been realized using CMOS 130nm UMC technology for ultra-low-power communication system applications. In addition, it was shown that using a 7-bit controls to switch between the power transistors adaptively and an 8-bit controls to switch between the capacitor banks are enough to overcome the interaction which occur at the input of combiner. Finally, the design exhibits 1-dB compression point equal to -6dBm and efficiency equal to 26%, which meet the required specifications
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