Support of FMA in open-source processor / Ahmed Ali Ismail Ali Mohamed ; Supervised Hossam A. H. Fahmy
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- دعم وحدة ضرب و جمع مدمجة ذات النقطة العائمة فى معالج مفتوح المصدر [Added title page title]
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قاعة الرسائل الجامعية - الدور الاول | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2016.Ah.S (Browse shelf(Opens below)) | Not for loan | 01010110071312000 | ||
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مخـــزن الرســائل الجـــامعية - البدروم | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2016.Ah.S (Browse shelf(Opens below)) | 71312.CD | Not for loan | 01020110071312000 |
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Cai01.13.08.M.Sc.2016.Ah.S A single core fpga aes cipher\decipher for key lengths of 128, 192 and 256 bits / | Cai01.13.08.M.Sc.2016.Ah.S A single core fpga aes cipher\decipher for key lengths of 128, 192 and 256 bits / | Cai01.13.08.M.Sc.2016.Ah.S Support of FMA in open-source processor / | Cai01.13.08.M.Sc.2016.Ah.S Support of FMA in open-source processor / | Cai01.13.08.M.Sc.2016.Al.U Ultra low power sar adc for sensor nodes / | Cai01.13.08.M.Sc.2016.Al.U Ultra low power sar adc for sensor nodes / | Cai01.13.08.M.Sc.2016.Am.I Iris recognition system for Non ideal cases / |
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications
In this work, we have added the support of the fused multiply Add (FMA) unit in OpenSparc T2 open-source processor. The FMA unit used supports both binary and decimal formats. The used FMA optimizes the area and power consumption by sharing most of the hardware between the binary and decimal operations. The work done includes modifying the processor instruction set architecture (ISA) to support the new operations, integrating the FMA unit inside the floating point unit of the processor, updating the processor to understand the new instructions and communicate correctly with the new unit. The work done also includes modifying the assembler to understand the assembly of the new instructions and generates the executable accordingly. During our work we verified the FMA unit using formal verification technology and found and fixed many bugs in the implementation. We also proposed a methodology for verifying the floating point units using formal verification
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