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NOC router and arbiter for FPGA / Khaled Abdullah Helal Kelany ; Supervised Hossam A. H. Fahmy , Hassan Mostafa

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Cairo : Khaled Abdullah Helal Kelany , 2016Description: 92 P. : charts ; 30cmOther title:
  • جهاز توجيه و محكم لشبكات الرقائق الالكترونية الخاصة بمصفوفة البوابات المنطقية القابلة للبرمجة [Added title page title]
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  • Issued also as CD
Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication Summary: The advancement in semiconductor technology has led to a high density chip which moves the bottleneck from the on-chip computation systems to the on-chip commu-nication systems. This advancement gives FPGA a chance to compete with AISC. However, the conventional communication paradigms failed to ful{uFB01}ll the on-chip sys- tem needs. Networks-on-chips (NoCs) are considered a promising solution for on-chip communications challenges. This thesis investigates developing a high performance NoC that targets FPGA
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Item type Current library Home library Call number Copy number Status Barcode
Thesis Thesis قاعة الرسائل الجامعية - الدور الاول المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2016.Kh.N (Browse shelf(Opens below)) Not for loan 01010110072061000
CD - Rom CD - Rom مخـــزن الرســائل الجـــامعية - البدروم المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2016.Kh.N (Browse shelf(Opens below)) 72061.CD Not for loan 01020110072061000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication

The advancement in semiconductor technology has led to a high density chip which moves the bottleneck from the on-chip computation systems to the on-chip commu-nication systems. This advancement gives FPGA a chance to compete with AISC. However, the conventional communication paradigms failed to ful{uFB01}ll the on-chip sys- tem needs. Networks-on-chips (NoCs) are considered a promising solution for on-chip communications challenges. This thesis investigates developing a high performance NoC that targets FPGA

Issued also as CD

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