header
Local cover image
Local cover image
Image from OpenLibrary

Design of a configurable 3d network on chip based on the direct elevator 3D routing algorithm / Maha Ramadan Mohamed Beheiry ; Supervised Ahmed M. Soliman , Hassan Mostafa

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Cairo : Maha Ramadan Mohamed Beheiry , 2017Description: 123 P. : charts , facsimiles ; 30cmOther title:
  • تصميم شبكة قابلة للضبط على رقاقة ثلاثية الأبعاد باستخدام خوارزمية التوجيه المسماه بالمصعد المباشر ثلاثي الأبعاد [Added title page title]
Subject(s): Online resources: Available additional physical forms:
  • Issued also as CD
Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications Engineering Summary: The main goal of the thesis is to provide the designers with a tool to create different configurations of the Three-Dimensional Network-On-Chips. These different configurationally Three Dimensional (3D) Network-On-Chips (NoCs) will be then evaluated to determine which configuration is the best for a specific design or application. The 3D-NoCs are implemented based on a 3D routing algorithm denoted by Direct Elevator algorithm
Tags from this library: No tags from this library for this title. Log in to add tags.
Star ratings
    Average rating: 0.0 (0 votes)
Holdings
Item type Current library Home library Call number Copy number Status Barcode
Thesis Thesis قاعة الرسائل الجامعية - الدور الاول المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2017.Ma.D (Browse shelf(Opens below)) Not for loan 01010110074819000
CD - Rom CD - Rom مخـــزن الرســائل الجـــامعية - البدروم المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2017.Ma.D (Browse shelf(Opens below)) 74819.CD Not for loan 01020110074819000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications Engineering

The main goal of the thesis is to provide the designers with a tool to create different configurations of the Three-Dimensional Network-On-Chips. These different configurationally Three Dimensional (3D) Network-On-Chips (NoCs) will be then evaluated to determine which configuration is the best for a specific design or application. The 3D-NoCs are implemented based on a 3D routing algorithm denoted by Direct Elevator algorithm

Issued also as CD

There are no comments on this title.

to post a comment.

Click on an image to view it in the image viewer

Local cover image