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A novel generic hybrid architecture for radix-r fast fourier transform / Mahmoud Ismail Soliman Nazmy Elbeltagy ; Supervised Omar Ahmed Nasr

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Cairo : Mahmoud Ismail Soliman Nazmy Elbeltagy , 2018Description: 94 P. : charts , facsimiles ; 30cmOther title:
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Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications Summary: Pipelined FFT architectures are divided into series, parallel, and hybrid architectures.Series architecture o{uFB00}er small area at the expense of low thoughput while parallel architecture o{uFB00}er high throughput at the expence of large area. Hybrid architectures are an intermediate point between series and parallel architecture where we can tune area and throughput requirement.Our work proposes a novel generic hybrid architecture for radix-r FFT.The proposed architecture o{uFB00}ers great savings in memory requirements compared to currently available architectures using normal input order
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Thesis Thesis قاعة الرسائل الجامعية - الدور الاول المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2018.Ma.N (Browse shelf(Opens below)) Not for loan 01010110077527000
CD - Rom CD - Rom مخـــزن الرســائل الجـــامعية - البدروم المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2018.Ma.N (Browse shelf(Opens below)) 77527.CD Not for loan 01020110077527000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications

Pipelined FFT architectures are divided into series, parallel, and hybrid architectures.Series architecture o{uFB00}er small area at the expense of low thoughput while parallel architecture o{uFB00}er high throughput at the expence of large area. Hybrid architectures are an intermediate point between series and parallel architecture where we can tune area and throughput requirement.Our work proposes a novel generic hybrid architecture for radix-r FFT.The proposed architecture o{uFB00}ers great savings in memory requirements compared to currently available architectures using normal input order

Issued also as CD

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