Design of a reconfigurable network on chip for next generation fpga using dynamic partial reconfiguration / Ramy Ahmed Ali Mohamed ; Supervised Ahmed Hussein Mohamed , Hassan Mostafa Hassan
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- تصميم لشبكة تواصل معلومات معاد تشكيلها للجيل القادم من المصفوفات القابلة للبرمجة بإستخدام إعادة التشكيل الجزئى الديناميكى [Added title page title]
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قاعة الرسائل الجامعية - الدور الاول | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2019.Ra.D (Browse shelf(Opens below)) | Not for loan | 01010110079233000 | |||
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مخـــزن الرســائل الجـــامعية - البدروم | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2019.Ra.D (Browse shelf(Opens below)) | 79233.CD | Not for loan | 01020110079233000 |
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
The main goal of this thesis is to present the runtime configurability support to CONNECT Network-on-Chip (NoC). Additionally, the thesis studies the reconfigurability impact on the network performance with its different configuration parameters. In comparison with the fixed NoCs, the runtime configurable NoCs save area by reusing a part of the network when it is not required during runtime. A reconfiguration tool is developed helping the user to decide the optimum network structure for every used benchmark
Issued also as CD
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