Low power dual mode bluetooth 5.1/bluetooth low energy receiver design / Ahmed Magdy Afifi Azb ; Supervised Ahmed Hussien Mohamed Khalil , Hassan Mostafa Hassan Mostafa
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- تصميم مستقبل منخفض الطاقة ذو وضعى تشغيل للبلوتوث و البلوتوث منخفض الطاقة [Added title page title]
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قاعة الرسائل الجامعية - الدور الاول | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2021.Ah.L (Browse shelf(Opens below)) | Not for loan | 01010110083624000 | ||
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مخـــزن الرســائل الجـــامعية - البدروم | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2021.Ah.L (Browse shelf(Opens below)) | 83624.CD | Not for loan | 01020110083624000 |
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Cai01.13.08.M.Sc.2020.Sa.P Performance study of power allocation Schemes in ultra-dense networks / | Cai01.13.08.M.Sc.2020.Wa.N A neural network-based visible light communication indoor positioning system for moving users / | Cai01.13.08.M.Sc.2020.Wa.N A neural network-based visible light communication indoor positioning system for moving users / | Cai01.13.08.M.Sc.2021.Ah.L Low power dual mode bluetooth 5.1/bluetooth low energy receiver design / | Cai01.13.08.M.Sc.2021.Ah.L Low power dual mode bluetooth 5.1/bluetooth low energy receiver design / | Cai01.13.08.M.Sc.2021.Ah.P Power-efficient design of high performance googlenet-based convolutional neural networks hardware accelerator / | Cai01.13.08.M.Sc.2021.Ah.P Power-efficient design of high performance googlenet-based convolutional neural networks hardware accelerator / |
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications Engineering
This thesis presents, for the first time, single Bluetooth5.1 and Bluetooth low energy compliant receiver design compromises two operation modes {u2013} low-power mode, and high-performance mode {u2013} using fundamental and third harmonic LO down-conversion in passive mixer-first. Passive mixer analysis is presented as well. It brings up various techniques for low-power consumption at both system and circuit level. Low-IF mixer first architecture is utilized to optimize power consumption at system level. Furthermore, harmonic down-conversion in the low-power mode enables quadrature LO generation. Reduced supply voltage, passive mixers, and current reuse address power minimization at circuit level. It is implemented in 65 nm CMOS technology and occupies an active area of 0.551 {u1D48E}{u1D48E}{u1D7D0} consuming only 697 oW and 1250 oW when operating in low-power mode and high-performance mode respectively. Low-power mode RX achieves a noise figure of 12.82 dB and IIP3 of +5.58 dBm while provides image rejection by 81 dB. For high-performance mode, the RX front end achieves a 6.3 dB noise figure, +2.6 dBm IIP3, and 65 dB image rejection
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