Design and implementation of FPGA Based systolic array for LZ Data Compression / Mohamed Ahmed Abdelghany Ahmed ; Supervised Aly Ezzat Salama , ahmed Hussien Khalil

By:

Mohamed Ahmed Abdelghany Ahmed

Contributor(s):

Language: Eng Publication details: Cairo : mohamed Ahmed Abdelghany , 2006Description: 150p : ill ; 30cmSubject(s):

FPGA
LZ

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Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty Of Engineering - Department Of Electronics and Communications Summary: Among lossless data compression algorithms for hardware implementation lempel Ziv algorithm is one of the most widely used in this thesis we present an efficient systolic array for lempel Ziv data compression based on FPGA implementation

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Item type	Current library	Home library	Call number	Copy number	Status	Barcode
Thesis	قاعة الرسائل الجامعية - الدور الاول	المكتبة المركزبة الجديدة - جامعة القاهرة	Cai01.13.08.M.Sc.2006.Mo.D. (Browse shelf(Opens below))		Not for loan	01010110045576000
CD - Rom	مخـــزن الرســائل الجـــامعية - البدروم	المكتبة المركزبة الجديدة - جامعة القاهرة	Cai01.13.08.M.Sc.2006.Mo.D. (Browse shelf(Opens below))	45576.CD	Not for loan	01020110045576000

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Thesis (M.Sc.) - Cairo University - Faculty Of Engineering - Department Of Electronics and Communications

Among lossless data compression algorithms for hardware implementation lempel Ziv algorithm is one of the most widely used in this thesis we present an efficient systolic array for lempel Ziv data compression based on FPGA implementation

Issued also as CD

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