TY  - BOOK
AU  - Ahmed Mohammed Ahmed Nassar 
AU  - Ahmed Eladawy Emira , 
AU  - Ahmed Hussein Khalil , 
AU  - Wael Sobhy Ghabrial , 
TI  - Multichannel clock and data recovery : : A synchronous approach / 
PY  - 2009///
CY  - Cairo : 
PB  - Ahmed Mohammed Ahmed Nassar , 
KW  - Clock and data recovery
KW  - Jitter
KW  - Phase - locked loops
N1  - Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication; Issued also as CD
N2  - In this thesis, I propose a novel fully integrated scalable multi - channel clock and data recovery design that realizes significant area and power savings to bring Tbps (tera - bits - per - second ) communication within reach and make it an integrable function at the periphery of high - speed systems and SoCs . The proposed chip design exploits the synchrony of multiple point - to - point optical or inter - chip links and constructs a novel scalable architecture that saves on chip area by using a single VCO block to drive multiple phase detection loops
UR  - http://172.23.153.220/th.pdf
ER  -