Walaa Abdelaziz Ibrahim <br/><br/>
Binary floating point fused multiply add unit /  
 وحدة جمع وضرب مدمجتين للارقام العائمة الثنائية 
Walaa Abdelaziz Ibrahim ; Supervised Ahmed Hussein Khalil , Hossam Aly Fahmy 
 - Cairo :   Walaa Abdelaziz Ibrahim ,   2012 
 - 88P. :   charts ;   30cm 
<br/><br/>Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication 
<br/><br/> Fused multiply add operation is very important in many scientific application . Many floating - point fused multiply add algorithms are developed to reduce the overall latency of the operation . The greatest deviation from the original IBM RS / 6000 architecture comes from a paper by T. Lang and J. D. Brugurea in 2005 . The main objective of our work is to implement this algorithm but with little change to facilitate the implementation without affecting the performance 
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<br/><br/><label>Subjects--Index Terms: </label>Floating -  point arithmetic  Fused multiply add operation  Multipliers