Mohamed Ahmed Abdelghany Ahmed Elsayed Salem <br/><br/>
High throughput low power architecture for network-on-chip /  
 تصميم ذو معدل مرتفع لانتقال البيانات ومنخفض لاستهلاك الطاقة للشبكة الرقاقة الالكترونية 
Mohamed Ahmed Abdelghany Ahmed Elsayed Salem ; Supervised Darek Korzec , Mohammed Ismail 
 - Cairo :   Mohamed Ahmed Abdelghany Ahmed Elsayed Salem ,   2010 
 - 159Leaves :   charts , facsimiles ;   30cm 
<br/><br/>Thesis (Ph.D.) - German University - Faculty of Postgraduate Studies and Scientific Research - Department of Information Engineering and Technology 
<br/><br/> With the rapid advance in technology in today's System - on - chip (SoC) , the number and functionality of intellectual property blocks (IPs) and the complexity of interconnects have been increasing dramatically . Since the system scalability and bandwidth of SoCs are limited , Network on Chip (NoC) architectures are emerging as the best replacement for the existing interconnects architectures