Ramy Ahmed Ali Mohamed <br/><br/>
Design of a reconfigurable network on chip for next generation fpga using dynamic partial reconfiguration /  
 تصميم لشبكة تواصل معلومات معاد تشكيلها للجيل القادم من المصفوفات القابلة للبرمجة بإستخدام إعادة التشكيل الجزئى الديناميكى 
Ramy Ahmed Ali Mohamed ; Supervised Ahmed Hussein Mohamed , Hassan Mostafa Hassan  
 - Cairo :   Ramy Ahmed Ali Mohamed ,   2019 
 - 74 P. :   charts ;   30cm 
<br/><br/>Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication 
<br/><br/> The main goal of this thesis is to present the runtime configurability support to CONNECT Network-on-Chip (NoC). Additionally, the thesis studies the reconfigurability impact on the network performance with its different configuration parameters. In comparison with the fixed NoCs, the runtime configurable NoCs save area by reusing a part of the network when it is not required during runtime. A reconfiguration tool is developed helping the user to decide the optimum network structure for every used benchmark 
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<br/><br/><label>Subjects--Index Terms: </label>FPGA  Network on Chip  Partial Dynamic Reconfiguration