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Verification of decimal floating-point operations / Amr Abdelfatah Ramdan Sayed Ahmed ; Supervised Hossam A. H. Fahmy

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Cairo : Amr Abdelfatah Ramdan Sayed Ahmed , 2011Description: 98 P. ; 30cmOther title:
  • التحقق من صحة العمليات الحسابية العشرية [Added title page title]
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  • Issued also as CD
Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication Summary: Decimal floating-point designs require a verification process to prove that the design is in compliance with the IEEE standarf for floating-point arihmetic (IEEE Std 754-2008). Our work is a decimal floating-point verification using simulation based verification, which a simulation method based on coverage models to cover corner cases of a certain decimal floating-point operation
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Item type Current library Home library Call number Copy number Status Barcode
Thesis Thesis قاعة الرسائل الجامعية - الدور الاول المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2011.Am.V (Browse shelf(Opens below)) Not for loan 01010110056372000
CD - Rom CD - Rom مخـــزن الرســائل الجـــامعية - البدروم المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2011.Am.V (Browse shelf(Opens below)) 56372.CD Not for loan 01020110056372000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication

Decimal floating-point designs require a verification process to prove that the design is in compliance with the IEEE standarf for floating-point arihmetic (IEEE Std 754-2008). Our work is a decimal floating-point verification using simulation based verification, which a simulation method based on coverage models to cover corner cases of a certain decimal floating-point operation

Issued also as CD

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