Design and implement ation for a multi-standard turbo decoder using a reconfigurable asip / Eid Mohamed Abdelhamid Abdelazim ; Supervised Ahmed F. Shalash , Hossam A. H. Fahmy
Material type: TextLanguage: English Publication details: Cairo : Eid Mohamed Abdelhamid Abdelazim , 2013Description: 85 P. : charts , facsimiles ; 30cmOther title:- تصميم وبناء معالج متخصص لفك الاكواد التوربينية لنظم متعددة [Added title page title]
- Issued also as CD
Item type | Current library | Home library | Call number | Copy number | Status | Date due | Barcode | |
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Thesis | قاعة الرسائل الجامعية - الدور الاول | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2013.Ei.D (Browse shelf(Opens below)) | Not for loan | 01010110061929000 | |||
CD - Rom | مخـــزن الرســائل الجـــامعية - البدروم | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2013.Ei.D (Browse shelf(Opens below)) | 61929.CD | Not for loan | 01020110061929000 |
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
This thesis presents an efficient architecture to implement a turbo decoder using a scalable low energy application specific instruction - ser processor (ASIP) . The parallelism on the ASIP architecture is proposed to achieve the high - throughput demand for turbo decoder which is one of the most important requirements of the fourth generation (4G) wireless communication systems
Issued also as CD
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