Successive approximation register with continuous dis-assembly algorithm (SAR-CD) and circuit design for time-based analog to digital converters (TADC) / Karim Osama Ragab Mahmoud ; Supervised Ahmed Emira , Hassan Mostafa

بواسطة:

Karim Osama Ragab Mahmoud

المساهم:

نوع المادة :

نصاللغة: الإنجليزية تفاصيل النشر: Cairo : Karim Osama Ragab Mahmoud , 2017الوصف: 107 P. : charts , facsimiles ; 30cmعنوان آخر:

خوارزم{u٠٦أأ}ة و تصم{u٠٦أأ}م دائرة بإستخدام تقن{u٠٦أأ}ة التقر{u٠٦أأ}ب المتتابع بالتقط{u٠٦أأ}ع المتواصل لمحولات الب{u٠٦أأ}انات ذات الطابع الزمنى [عنوان مضاف عنوان الصفحة]

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ملاحظة الأطروحة: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication ملخص: This work proposes a novel algorithm for analog to digital conversion. The algorithm is a modified version of the successive approximation algorithm in which binary sub-weights of the input maximum are used to evaluate the corresponding digital words in a cyclic manner. The proposed algorithm moves the conditioning between the evaluated bits from the analog domain to the digital domain. In folded versions of the successive approximation ADC circuits, in which bits are evaluated in an iterative fashion, digital to analog converters may not be needed anymore. This major advantage promises for reduction in fabrication area and power consumption. A full mathematical proof for the algorithm is also introduced. A new circuit design is developed to utilize the algorithm benefits. Results show competent power and reduction with state-of-art designs

وسوم من هذه المكتبة: لا توجد وسوم لهذا العنوان في هذه المكتبة. قم بتسجيل الدخول لإضافة الوسوم.

المقتنيات
نوع المادة	المكتبة الحالية	المكتبة الرئيسية	رقم الاستدعاء	رقم النسخة	حالة	الباركود
Thesis	قاعة الرسائل الجامعية - الدور الاول	المكتبة المركزبة الجديدة - جامعة القاهرة	Cai01.13.08.M.Sc.2017.Ka.S (استعراض الرف(يفتح أدناه))		لا تعار	01010110073889000
CD - Rom	مخـــزن الرســائل الجـــامعية - البدروم	المكتبة المركزبة الجديدة - جامعة القاهرة	Cai01.13.08.M.Sc.2017.Ka.S (استعراض الرف(يفتح أدناه))	73889.CD	لا تعار	01020110073889000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication

This work proposes a novel algorithm for analog to digital conversion. The algorithm is a modified version of the successive approximation algorithm in which binary sub-weights of the input maximum are used to evaluate the corresponding digital words in a cyclic manner. The proposed algorithm moves the conditioning between the evaluated bits from the analog domain to the digital domain. In folded versions of the successive approximation ADC circuits, in which bits are evaluated in an iterative fashion, digital to analog converters may not be needed anymore. This major advantage promises for reduction in fabrication area and power consumption. A full mathematical proof for the algorithm is also introduced. A new circuit design is developed to utilize the algorithm benefits. Results show competent power and reduction with state-of-art designs

Issued also as CD

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Successive approximation register with continuous dis-assembly algorithm (SAR-CD) and circuit design for time-based analog to digital converters (TADC) / Karim Osama Ragab Mahmoud ; Supervised Ahmed Emira , Hassan Mostafa