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High performance memory requests scheduling technique for multicore processors / Walid Ahmed Mohamed Mohamed Elreedy ; Supervised Amin M. Nassar , Hossam A. H. Fahmy , Ali A. Elmoursy

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Cairo : Walid Ahmed Mohamed Mohamed Elreedy , 2012Description: 82 P. : plans ; 30cmOther title:
  • نظام جدولة عالي الأداء لطلبات الذاكرة في المعالجات متعددة الأنوية [Added title page title]
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Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication Summary: In this paper, we propose two new memory access scheduling techniques the Fair Least-Request Most Related (DLRMR) algorithm, and the Fair Issue-Queue based Most Related (FIQMR) algorithm based on the Least Reques (LREQ) algorithm and the Issue Queue based (IQ-based) algorithm respectively. The results show that FLRMR improves fairness over LREQ by 54.6% on average and speedup by 8.64% on average
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Item type Current library Home library Call number Copy number Status Barcode
Thesis Thesis قاعة الرسائل الجامعية - الدور الاول المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2012.Wa.H (Browse shelf(Opens below)) Not for loan 01010110059456000
CD - Rom CD - Rom مخـــزن الرســائل الجـــامعية - البدروم المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2012.Wa.H (Browse shelf(Opens below)) 59456.CD Not for loan 01020110059456000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication

In this paper, we propose two new memory access scheduling techniques the Fair Least-Request Most Related (DLRMR) algorithm, and the Fair Issue-Queue based Most Related (FIQMR) algorithm based on the Least Reques (LREQ) algorithm and the Issue Queue based (IQ-based) algorithm respectively. The results show that FLRMR improves fairness over LREQ by 54.6% on average and speedup by 8.64% on average

Issued also as CD

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