| 000 | 01692cam a2200337 a 4500 | ||
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| 003 | EG-GiCUC | ||
| 005 | 20250223030652.0 | ||
| 008 | 120910s2012 ua d f m 000 0 eng d | ||
| 040 |
_aEG-GiCUC _beng _cEG-GiCUC |
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| 041 | 0 | _aeng | |
| 049 | _aDeposite | ||
| 097 | _aM.Sc | ||
| 099 | _aCai01.13.08.M.Sc.2012.Wa.B | ||
| 100 | 0 | _aWalaa Abdelaziz Ibrahim | |
| 245 | 1 | 0 |
_aBinary floating point fused multiply add unit / _cWalaa Abdelaziz Ibrahim ; Supervised Ahmed Hussein Khalil , Hossam Aly Fahmy |
| 246 | 1 | 5 | _aوحدة جمع وضرب مدمجتين للارقام العائمة الثنائية |
| 260 |
_aCairo : _bWalaa Abdelaziz Ibrahim , _c2012 |
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| 300 |
_a88P. : _bcharts ; _c30cm |
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| 502 | _aThesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication | ||
| 520 | _aFused multiply add operation is very important in many scientific application . Many floating - point fused multiply add algorithms are developed to reduce the overall latency of the operation . The greatest deviation from the original IBM RS / 6000 architecture comes from a paper by T. Lang and J. D. Brugurea in 2005 . The main objective of our work is to implement this algorithm but with little change to facilitate the implementation without affecting the performance | ||
| 530 | _aIssued also as CD | ||
| 653 | 4 | _aFloating - point arithmetic | |
| 653 | 4 | _aFused multiply add operation | |
| 653 | 4 | _aMultipliers | |
| 700 | 0 |
_aAhmed Hussein Khalil , _eSupervisor |
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| 700 | 0 |
_aHossam Aly Fahmy , _eSupervisor |
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| 856 | _uhttp://172.23.153.220/th.pdf | ||
| 905 |
_aFatma _eCataloger |
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| 905 |
_aNazla _eRevisor |
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_2ddc _cTH |
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_c39455 _d39455 |
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