| 000 | 01601cam a2200325 a 4500 | ||
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| 003 | EG-GiCUC | ||
| 005 | 20250223030727.0 | ||
| 008 | 121219s2012 ua d f m 000 0 eng d | ||
| 040 |
_aEG-GiCUC _beng _cEG-GiCUC |
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| 041 | 0 | _aeng | |
| 049 | _aDeposite | ||
| 097 | _aM.Sc | ||
| 099 | _aCai01.13.08.M.Sc.2012.Sh.E | ||
| 100 | 0 | _aShehab Yomn Abdellatif Elsayed | |
| 245 | 1 | 0 |
_aError correction in floating point units using information redundancy / _cShehab Yomn Abdellatif Elsayed ; Supervised Hossam A. H. Fahmy |
| 246 | 1 | 5 | _aتصحيح الأخطاء فى وحدات الأعداد الكسرية بإستخدام معلومات زائدة |
| 260 |
_aCairo : _bShehab Yomn Abdellatif Elsayed , _c2012 |
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| 300 |
_a80P. : _bcharts ; _c30cm |
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| 502 | _aThesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication | ||
| 520 | _aThis work is an attempt to achieve fault tolerance in a combined floating point redundant adder by using residue codes . To our knowledge this is the first implementation of a residue error correction scheme in decimal and binary arithmetic circuits . The proposed method is able to correct any error in the 4- digit numbers being checked assuming that errors occure only in the main adder | ||
| 530 | _aIssued also as CD | ||
| 653 | 4 | _aError correction | |
| 653 | 4 | _aFloating point numbers | |
| 653 | 4 | _aResidue codes | |
| 700 | 0 |
_aHossam Aly Hassan Fahmy , _eSupervisor |
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| 856 | _uhttp://172.23.153.220/th.pdf | ||
| 905 |
_aNazla _eRevisor |
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| 905 |
_aSoheir _eCataloger |
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| 942 |
_2ddc _cTH |
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| 999 |
_c40648 _d40648 |
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