| 000 | 012230000a22003250004500 | ||
|---|---|---|---|
| 003 | EG-GICUC | ||
| 005 | 20250223032454.0 | ||
| 008 | 070320s2003 ua f m 000 0 eng d | ||
| 040 |
_aEG-GICUC _beng _cEG-GICUC |
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| 041 | 0 | _aEng | |
| 049 | _aDeposite | ||
| 097 | _aPh.D | ||
| 099 | _aCai01.13.08.Ph.D.2003.Mo.M | ||
| 100 | 0 | _aMohsen Muhammad Ibrahim Mahroos | |
| 245 | 1 | 0 |
_aMultiple - valued logic circuits design synthesis and optimization / _cMohsen Muhammad Ibrahim Mahroos ; Supervised Abd El haleem Shousha , Yassin Elcherif |
| 246 | 1 | 5 | _aتصميم البناء الامثل للدوائر المنطقية متعددة القيم |
| 260 |
_aCairo : _bMohsen Muhammad Ibrahim Mahroos , _c2003 |
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| 300 |
_a94P ; _c30cm |
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| 502 | _aThesis (PH.D.) - Cairo University - Faculty Of Engineering - Department Of Electronics and Communications | ||
| 530 | _aIssued also as CD | ||
| 653 | 4 | _aDesign synthesis | |
| 653 | 4 | _aMultiple - valued logic | |
| 653 | 4 | _aOptimization | |
| 700 | 0 |
_aAbdElhaleem Shousha , _eSupervisor |
|
| 700 | 0 |
_aYassin Elcherif , _eSupervisor |
|
| 856 | _uhttp://172.23.153.220/th.pdf | ||
| 905 |
_aMustafa _eRevisor |
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| 905 |
_aSamia _eCataloger |
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| 942 |
_2ddc _cTH |
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| 999 |
_c75678 _d75678 |
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