Implementation of a reconfigurable ASIP for high throughput low power DFT / DCT / FIR engine /

Hanan Moharram Hassan Moharram

Implementation of a reconfigurable ASIP for high throughput low power DFT / DCT / FIR engine / تنفيذ معالج قليل استهلاك الكهرباء عالى الاداء قابل لاعاده التهيئة محدد الاوامر لحساب تحويلة جيب التمام المقطعية والمرشحات محددة الاستجابة Hanan Moharram Hassan Moharram ; Supervised Ahmed F. Shalash , Karim Ossama Mohammed , Tamer Elbat - Cairo : Hanan Moharram Hassan Moharram , 2011 - 90 P. : charts , facsimiles ; 30cm

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications Engineering

the thesis present an ASIP design for a DFT / DCT / FIR engine . The engine is intended for use in an accelerator - chain implementation of wireless communication system . The engine offers a very high degree of flexibility accepting and accelerating the performance of any - number DFT and IDFT one and two dimension DCT and even general implementation of FIR equations



DCT DFT FIR
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