Implementation and evaluation of large interconnection routers for future many- core networks on chip /
Amir Hasan Mohamed Zaytoun
Implementation and evaluation of large interconnection routers for future many- core networks on chip / تنفيذ وتقييم أداء المحولات الكبيرة فى شبكات الدوائر المستقبلية متعددة الأنوية Amir Hasan Mohamed Zaytoun ; Supervised Khaled Mohamed Fouad Elsayed , Hossam Aly Hassan Fahmy - Cairo : Amir Hasan Mohamed Zaytoun , 2012 - 136P. : charts , facsimiles ; 30cm
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
As the number of processing elements in the future networks-on-chip (NoC)increases from multi-cores to many- cores the role of the interconnection communications becomes more critical . The number of cores on a system-on-chip (SoC) will reach thousands in the near future as predicted by the International Technology Roadmap for Semiconductors (ITRS)
Networks-on-chip Router System-on-chip
Implementation and evaluation of large interconnection routers for future many- core networks on chip / تنفيذ وتقييم أداء المحولات الكبيرة فى شبكات الدوائر المستقبلية متعددة الأنوية Amir Hasan Mohamed Zaytoun ; Supervised Khaled Mohamed Fouad Elsayed , Hossam Aly Hassan Fahmy - Cairo : Amir Hasan Mohamed Zaytoun , 2012 - 136P. : charts , facsimiles ; 30cm
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
As the number of processing elements in the future networks-on-chip (NoC)increases from multi-cores to many- cores the role of the interconnection communications becomes more critical . The number of cores on a system-on-chip (SoC) will reach thousands in the near future as predicted by the International Technology Roadmap for Semiconductors (ITRS)
Networks-on-chip Router System-on-chip