Low power nanometer FPGA design techniques at the device and circuit levels / (Record no. 62409)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 02998cam a2200337 a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | EG-GiCUC |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20250223031809.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 170919s2016 ua dh f m 000 0 eng d |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | EG-GiCUC |
| Language of cataloging | eng |
| Transcribing agency | EG-GiCUC |
| 041 0# - LANGUAGE CODE | |
| Language code of text/sound track or separate title | eng |
| 049 ## - LOCAL HOLDINGS (OCLC) | |
| Holding library | Deposite |
| 097 ## - Thesis Degree | |
| Thesis Level | M.Sc |
| 099 ## - LOCAL FREE-TEXT CALL NUMBER (OCLC) | |
| Classification number | Cai01.13.08.M.Sc.2016.Os.L |
| 100 0# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Osama Ahmed Mohamed Ahmed Abdelkader |
| 245 10 - TITLE STATEMENT | |
| Title | Low power nanometer FPGA design techniques at the device and circuit levels / |
| Statement of responsibility, etc. | Osama Ahmed Mohamed Ahmed Abdelkader ; Supervised Ahmed M. Soliman , Hassan Mostafa |
| 246 15 - VARYING FORM OF TITLE | |
| Title proper/short title | طرق تصميم مصفوفة بوابات منطقية قابلة للبرمجة قليلة القدرة علي مستوي الجهاز والدائرة |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Cairo : |
| Name of publisher, distributor, etc. | Osama Ahmed Mohamed Ahmed Abdelkader , |
| Date of publication, distribution, etc. | 2016 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 93 P. : |
| Other physical details | charts , facsimiles ; |
| Dimensions | 30cm |
| 502 ## - DISSERTATION NOTE | |
| Dissertation note | Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over last decades. The importance of FPGAs comes from their architecture, which consists of programmable logic functionality blocks and programmable interconnects. This nature of FPGA has a terrific impact on the quality of the final product{u2019}s performance, area, and power consumption. There are many techniques to make FPGAs more energy efficient. The different techniques can be categorized to: device, circuit, system, architecture, and computer-aided design (CAD). Device techniques refer to the usage of new emerging low-power process technologies offered by the semiconductor manufacturers, and new devices materials and structures. Circuit techniques refer to transistor level implementations of logic and routing resources. System techniques refer to high level techniques such as dynamic voltage and frequency control, power gating for unused resources, and dynamic reconfiguration. Architecture techniques refer to functionality of logic blocks, memory, and I/Os resources and the connectivity between these resources. Finally, CAD techniques refer to improvements added to the tools used to configure FPGAs to consider power consumption. In this work, we target introducing new design techniques to lower FPGAs power at device and circuit levels. First, we studied using dynamic threshold MOSFET (DTMOS) in FPGA logic blocks and showed that DTMOS can be used as a good candidate for designing ultra- low power FPGAs. The study also covered DTMOS MUXs as MUXs are the main part in FPGA routing fabricool which is widely used in academic researches of FPGA. |
| 530 ## - ADDITIONAL PHYSICAL FORM AVAILABLE NOTE | |
| Additional physical form available note | Issued also as CD |
| 653 #4 - INDEX TERM--UNCONTROLLED | |
| Uncontrolled term | DTMOS |
| 653 #4 - INDEX TERM--UNCONTROLLED | |
| Uncontrolled term | FinFET |
| 653 #4 - INDEX TERM--UNCONTROLLED | |
| Uncontrolled term | FPGA |
| 700 0# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Ahmed M. Soliman , |
| Relator term | |
| 700 0# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Hassan Mostafa , |
| Relator term | |
| 856 ## - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="http://172.23.153.220/th.pdf">http://172.23.153.220/th.pdf</a> |
| 905 ## - LOCAL DATA ELEMENT E, LDE (RLIN) | |
| Cataloger | Nazla |
| Reviser | Revisor |
| 905 ## - LOCAL DATA ELEMENT E, LDE (RLIN) | |
| Cataloger | Shimaa |
| Reviser | Cataloger |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Thesis |
| Source of classification or shelving scheme | Not for loan | Home library | Current library | Date acquired | Full call number | Barcode | Date last seen | Koha item type | Copy number |
|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | المكتبة المركزبة الجديدة - جامعة القاهرة | قاعة الرسائل الجامعية - الدور الاول | 11.02.2024 | Cai01.13.08.M.Sc.2016.Os.L | 01010110072482000 | 22.09.2023 | Thesis | ||
| Dewey Decimal Classification | المكتبة المركزبة الجديدة - جامعة القاهرة | مخـــزن الرســائل الجـــامعية - البدروم | 11.02.2024 | Cai01.13.08.M.Sc.2016.Os.L | 01020110072482000 | 22.09.2023 | CD - Rom | 72482.CD |