Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication

This work proposes HardWare-Friendly FFT (HW-F FFT): a restructuring of radix- r FFT butter{uFB02}y in order to achieve less area-time-power product compared with the conventional algorithm. Moreover, HW-F FFT allows the use of the unequal gain CORDIC types without the need of any compensation after them. In one case study, single path delay feedback (SDF) pipeline architecture is used. Given the same hardware resources, HW-F FFT achieves a substantial increase in the signal to quantization noise Ratio (SQNR) performance. The proposed algorithm o{uFB00}ers up to 75 dB SQNR gain compared to the conventional FFT for di{uFB00}erent radix-r FFT sizes when di{uFB00}erent CORDICs and complex multiplier sizes are employed. In the same case study, if it is required to maintain a certain SQNR level, HW-F FFT achieves less computational area, up to 40% less, compared with the conventional FFT

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