Amir Hasan Mohamed Zaytoun <br/><br/>
Implementation and evaluation of large interconnection routers for future many-  core networks on chip /  
 تنفيذ وتقييم أداء المحولات الكبيرة فى شبكات الدوائر المستقبلية متعددة الأنوية 
Amir Hasan Mohamed Zaytoun ; Supervised Khaled Mohamed Fouad Elsayed , Hossam Aly Hassan Fahmy 
 - Cairo :   Amir Hasan Mohamed Zaytoun ,   2012 
 - 136P. :   charts , facsimiles ;   30cm 
<br/><br/>Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication 
<br/><br/> As the number of processing elements in the future networks-on-chip (NoC)increases from multi-cores to many- cores the role of the interconnection communications becomes more critical . The number of cores on a system-on-chip (SoC) will reach thousands in the near future as predicted by the International Technology Roadmap for Semiconductors (ITRS) 
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<br/><br/><label>Subjects--Index Terms: </label>Networks-on-chip  Router  System-on-chip