| 000 | 01597cam a2200325 a 4500 | ||
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| 003 | EG-GiCUC | ||
| 005 | 20250223030624.0 | ||
| 008 | 120607s2011 ua de f m 000 0 eng d | ||
| 040 |
_aEG-GiCUC _beng _cEG-GiCUC |
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| 041 | 0 | _aeng | |
| 049 | _aDeposite | ||
| 097 | _aM.Sc | ||
| 099 | _aCai01.13.08.M.Sc.2011.Al.E | ||
| 100 | 0 | _aAlhassan Mohamed Fattin Mohamed Zaki Khedr | |
| 245 | 1 | 0 |
_aEnhanced performance of Cairo University SPARC processor at 65nm node / _cAlhassan Mohamed Fattin Mohamed Zaki Khedr ; Supervised Serag E. D. Habib |
| 246 | 1 | 5 | _aتحسين أداء معالج SPARC المطور بجامعة القاهرة بتكنولوجيا 65 نانومتر |
| 260 |
_aCairo : _bAlhassan Mohamed Fattin Mohamed Zaki Khedr , _c2011 |
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| 300 |
_a84P. : _bcharts , plans ; _c30cm |
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| 502 | _aThesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication | ||
| 520 | _aSeveral enhancements to the CUSPARC design are reported in this rhesis . First , to enhance its DSP performance , the CUSPARC design is augmented with an energy efficient 32 - bit integer multiplier. Second, the source code of the GCC compiler is customized to support the added multiplier. Third, the processor design is ported to the TSMC 65nm CMOS technology node | ||
| 530 | _aIssued also as CD | ||
| 653 | 4 | _a65nm | |
| 653 | 4 | _aCUSPARC processor | |
| 653 | 4 | _aGCC Compiler | |
| 700 | 0 |
_aSerag Eldin Habib , _eSupervisor |
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| 856 | _uhttp://172.23.153.220/th.pdf | ||
| 905 |
_aFatma _eCataloger |
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| 905 |
_aNazla _eRevisor |
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| 942 |
_2ddc _cTH |
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| 999 |
_c38557 _d38557 |
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