000			02998cam a2200337 a 4500
003			EG-GiCUC
005			20250223031809.0
008			170919s2016 ua dh f m 000 0 eng d
040			_aEG-GiCUC _beng _cEG-GiCUC
041	0		_aeng
049			_aDeposite
097			_aM.Sc
099			_aCai01.13.08.M.Sc.2016.Os.L
100	0		_aOsama Ahmed Mohamed Ahmed Abdelkader
245	1	0	_aLow power nanometer FPGA design techniques at the device and circuit levels / _cOsama Ahmed Mohamed Ahmed Abdelkader ; Supervised Ahmed M. Soliman , Hassan Mostafa
246	1	5	_aطرق تصميم مصفوفة بوابات منطقية قابلة للبرمجة قليلة القدرة علي مستوي الجهاز والدائرة
260			_aCairo : _bOsama Ahmed Mohamed Ahmed Abdelkader , _c2016
300			_a93 P. : _bcharts , facsimiles ; _c30cm
502			_aThesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications
520			_a Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over last decades. The importance of FPGAs comes from their architecture, which consists of programmable logic functionality blocks and programmable interconnects. This nature of FPGA has a terrific impact on the quality of the final product{u2019}s performance, area, and power consumption. There are many techniques to make FPGAs more energy efficient. The different techniques can be categorized to: device, circuit, system, architecture, and computer-aided design (CAD). Device techniques refer to the usage of new emerging low-power process technologies offered by the semiconductor manufacturers, and new devices materials and structures. Circuit techniques refer to transistor level implementations of logic and routing resources. System techniques refer to high level techniques such as dynamic voltage and frequency control, power gating for unused resources, and dynamic reconfiguration. Architecture techniques refer to functionality of logic blocks, memory, and I/Os resources and the connectivity between these resources. Finally, CAD techniques refer to improvements added to the tools used to configure FPGAs to consider power consumption. In this work, we target introducing new design techniques to lower FPGAs power at device and circuit levels. First, we studied using dynamic threshold MOSFET (DTMOS) in FPGA logic blocks and showed that DTMOS can be used as a good candidate for designing ultra- low power FPGAs. The study also covered DTMOS MUXs as MUXs are the main part in FPGA routing fabricool which is widely used in academic researches of FPGA.
530			_aIssued also as CD
653		4	_aDTMOS
653		4	_aFinFET
653		4	_aFPGA
700	0		_aAhmed M. Soliman , _esupervisor
700	0		_aHassan Mostafa , _esupervisor
856			_uhttp://172.23.153.220/th.pdf
905			_aNazla _eRevisor
905			_aShimaa _eCataloger
942			_2ddc _cTH
999			_c62409 _d62409