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Error correction in floating point units using information redundancy / Shehab Yomn Abdellatif Elsayed ; Supervised Hossam A. H. Fahmy

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Cairo : Shehab Yomn Abdellatif Elsayed , 2012Description: 80P. : charts ; 30cmOther title:
  • تصحيح الأخطاء فى وحدات الأعداد الكسرية بإستخدام معلومات زائدة [Added title page title]
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  • Issued also as CD
Dissertation note: Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication Summary: This work is an attempt to achieve fault tolerance in a combined floating point redundant adder by using residue codes . To our knowledge this is the first implementation of a residue error correction scheme in decimal and binary arithmetic circuits . The proposed method is able to correct any error in the 4- digit numbers being checked assuming that errors occure only in the main adder
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Item type Current library Home library Call number Copy number Status Barcode
Thesis Thesis قاعة الرسائل الجامعية - الدور الاول المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2012.Sh.E (Browse shelf(Opens below)) Not for loan 01010110058943000
CD - Rom CD - Rom مخـــزن الرســائل الجـــامعية - البدروم المكتبة المركزبة الجديدة - جامعة القاهرة Cai01.13.08.M.Sc.2012.Sh.E (Browse shelf(Opens below)) 58943.CD Not for loan 01020110058943000

Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication

This work is an attempt to achieve fault tolerance in a combined floating point redundant adder by using residue codes . To our knowledge this is the first implementation of a residue error correction scheme in decimal and binary arithmetic circuits . The proposed method is able to correct any error in the 4- digit numbers being checked assuming that errors occure only in the main adder

Issued also as CD

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