Implementation of a reconfigurable ASIP for high throughput low power DFT / DCT / FIR engine / Hanan Moharram Hassan Moharram ; Supervised Ahmed F. Shalash , Karim Ossama Mohammed , Tamer Elbat
Material type:
TextLanguage: English Publication details: Cairo : Hanan Moharram Hassan Moharram , 2011Description: 90 P. : charts , facsimiles ; 30cmOther title: - تنفيذ معالج قليل استهلاك الكهرباء عالى الاداء قابل لاعاده التهيئة محدد الاوامر لحساب تحويلة جيب التمام المقطعية والمرشحات محددة الاستجابة [Added title page title]
- Issued also as CD
| Item type | Current library | Home library | Call number | Copy number | Status | Barcode | |
|---|---|---|---|---|---|---|---|
Thesis
|
قاعة الرسائل الجامعية - الدور الاول | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2011.Ha.I (Browse shelf(Opens below)) | Not for loan | 01010110057369000 | ||
CD - Rom
|
مخـــزن الرســائل الجـــامعية - البدروم | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2011.Ha.I (Browse shelf(Opens below)) | 57369.CD | Not for loan | 01020110057369000 |
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communications Engineering
the thesis present an ASIP design for a DFT / DCT / FIR engine . The engine is intended for use in an accelerator - chain implementation of wireless communication system . The engine offers a very high degree of flexibility accepting and accelerating the performance of any - number DFT and IDFT one and two dimension DCT and even general implementation of FIR equations
Issued also as CD
There are no comments on this title.
Click on an image to view it in the image viewer