Implementation and evaluation of large interconnection routers for future many- core networks on chip / Amir Hasan Mohamed Zaytoun ; Supervised Khaled Mohamed Fouad Elsayed , Hossam Aly Hassan Fahmy
Material type:
TextLanguage: English Publication details: Cairo : Amir Hasan Mohamed Zaytoun , 2012Description: 136P. : charts , facsimiles ; 30cmOther title: - تنفيذ وتقييم أداء المحولات الكبيرة فى شبكات الدوائر المستقبلية متعددة الأنوية [Added title page title]
- Issued also as CD
| Item type | Current library | Home library | Call number | Copy number | Status | Barcode | |
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Thesis
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قاعة الرسائل الجامعية - الدور الاول | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2012.Am.I (Browse shelf(Opens below)) | Not for loan | 01010110059353000 | ||
CD - Rom
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مخـــزن الرســائل الجـــامعية - البدروم | المكتبة المركزبة الجديدة - جامعة القاهرة | Cai01.13.08.M.Sc.2012.Am.I (Browse shelf(Opens below)) | 59353.CD | Not for loan | 01020110059353000 |
Thesis (M.Sc.) - Cairo University - Faculty of Engineering - Department of Electronics and Communication
As the number of processing elements in the future networks-on-chip (NoC)increases from multi-cores to many- cores the role of the interconnection communications becomes more critical . The number of cores on a system-on-chip (SoC) will reach thousands in the near future as predicted by the International Technology Roadmap for Semiconductors (ITRS)
Issued also as CD
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